Complementary Metal-Oxide-Semiconductor (CMOS) device is one of basic semiconductor devices for forming integrated circuits. A CMOS device includes a P-type metal-oxide-semiconductor (PMOS) transistor and an N-type metal oxide semiconductor (NMOS) transistor.
In existing technology, in order to control short-channel effect at the same time of reducing gate size, high-K dielectric materials are used for replacing conventional materials such as silicon oxide and the like, as a gate dielectric layer of a transistor. Further, metal materials are used for replacing conventional materials such as polysilicon and the like, as a gate electrode layer of the transistor. Moreover, in existing technology, in order to adjust threshold voltages of the PMOS transistor and the NMOS transistor, work function layers are formed on the surface of the gate dielectric layers of the PMOS transistor and the NMOS transistor. The work function layer of the PMOS transistor needs to have a sufficiently high work function, whereas the work function layer of the NMOS transistor needs to have a sufficiently low work function. Therefore, for the PMOS transistor and the NMOS transistor, the work function layer is made of different materials, in order to meet the respective requirements for tuning the work functions.
In existing technology, during the forming of a CMOS device, a dummy gate layer is respectively formed on a surface of a semiconductor substrate at a region for forming a PMOS transistor and at a region for forming an NMOS transistor. After a source region and a drain region are formed using the dummy gate layer as a mask, a dielectric layer leveled with a surface of the dummy gate layer is formed on the surface of the semiconductor substrate. After the dielectric layer is formed, the dummy gate layer at the PMOS region or the NMOS region is removed, to form an opening in the dielectric layer. Further, a gate dielectric layer, a work function layer, and a gate electrode layer are sequentially deposited in the opening.
In such a process, the gate electrode layer is made of a metal. The gate dielectric layer is made of a high-K material. Such a method for forming a CMOS device is a gate-last process used for forming a high-K metal gate (HKMG). Moreover, the material of the work function layer formed at the PMOS region is different from the material of the work function layer formed at the NMOS region.
However, the existing process for forming transistors with multiple threshold voltages is often too complicated, and requires a high production cost with low production efficiency.